HiddenLayer555@lemmy.ml to Memes@lemmy.mlEnglish · 26 days agoIs 8GB a lot? Depends on the context.lemmy.mlimagemessage-square48linkfedilinkarrow-up1267arrow-down17cross-posted to: memes@lemmy.world
arrow-up1260arrow-down1imageIs 8GB a lot? Depends on the context.lemmy.mlHiddenLayer555@lemmy.ml to Memes@lemmy.mlEnglish · 26 days agomessage-square48linkfedilinkcross-posted to: memes@lemmy.world
minus-squareRob299 - she/her@lemmy.blahaj.zonelinkfedilinkEnglisharrow-up17·26 days ago1 tb is a good start for most use case. 5 tb…? now you’re getting somewhere.
minus-squareferric_carcinization@lemmy.mllinkfedilinkEnglisharrow-up4·26 days agoYou’re talking about register width, right?
minus-squareOpisek@lemmy.worldlinkfedilinkarrow-up5·25 days agoYeah, 5TB for every register of course.
minus-squareferric_carcinization@lemmy.mllinkfedilinkEnglisharrow-up3·24 days agoBut something could easily go wrong with such large registers & access would be slow. Maybe we should have RAID 1 for registers?
minus-squareOpisek@lemmy.worldlinkfedilinkarrow-up3·edit-224 days agoI only ever opt for RAID 5. It also help to use error correcting hardware.
minus-squareferric_carcinization@lemmy.mllinkfedilinkEnglisharrow-up3·24 days agoFor such large registers, I think error correction for the error correction might be useful.
1 tb is a good start for most use case. 5 tb…? now you’re getting somewhere.
L1 cache?
Registers
You’re talking about register width, right?
Yeah, 5TB for every register of course.
But something could easily go wrong with such large registers & access would be slow. Maybe we should have RAID 1 for registers?
I only ever opt for RAID 5. It also help to use error correcting hardware.
ECC cache
For such large registers, I think error correction for the error correction might be useful.